Low Voltage Organic Field Effect Transistors with Solution-Processed,
High-k BTO/Epoxy Nanocomposite Dielectric Gate Insulator

Abstract

Organic Field Effect Transistors (OFETs), whose characteristics are modulated by an electric filed, are a prominent constituent of modern microelectronics.  Since they were first introduced by Tsumura et al. in 1986, they have undergone great progress, especially during the last several years.  Currently, OFETs can rival the performance of Field Effect Transistors (FETs) based on amorphous silicon (a-Si:H).  OFETs are particularly interesting as their fabrication processes are more cost effective and much less complex compared with conventional silicon technology, In general, low-temperature deposition and solution processing can replace the high-temperature and high-vacuum deposition and sophisticated photolithographic pattering involved in conventional silicon technology.  Additionally, the mechanical flexibility of organic materials makes them compatible with flexible substrates for lightweight and foldable products. 

In many practical situations where low cost, “disposable electronics” products may be applied, cost restrictions will limit the available operational voltage.  It is thus paramount to develop organic electronic circuits that can operate with low switching voltages.  However, traditional OFETs often suffer from high operating voltage due to the low charge carrier mobilities of organic semiconductors.  Since the field-induced current is proportional to the field-induced charge density and carrier mobility, one approach to overcome this problem is by using a high dielectric constant (high-K) gate insulators  which can enhance the field-induced carrier density.  However, most high-K materials used for OFETs fabrication so far are based on ceramics and hence are usually brittle and expensive to prepare.  Additionally, the poor mechanical properties of ceramic materials makes it significantly challenging to utilize these materials in flexible electronics.  The preparation of these high-K materials requires high temperature annealing process, which is not compatible with plastics substrates.  Consequently, it is necessary to develop a low cost and solution-processable method to fabricate gate insulators with a high dielectric constant and mechanical flexibility.

Traditional OFET research has focused mainly on the development of organic semiconductor materials.  Enhancing the mobility of the semiconductor material has been achieved through rigorous research carried out by several organizations.  Considering the importance of device stability to the future of organic electronics and the role that the dielectric must play, there has been a conspicuous lack of effort devoted to this issue.  Research into OFET gate insulators is beginning to receive increased attention and is rapidly establishing itself as a line of research equally for organic electronics as the ‘traditional’ OFET research themes that address the organic semiconductor itself, and circuit engineering.

Research Scope

My research focuses on the development and characterization of a novel high K solution-processed nanocomposite dielectric layer for low voltage OFET gate insulator.  This work is protected by a patent disclosure being pursued by Motorola.  The Nanocomposite is a specialty material developed specifically for this research project by Hutsman of Switzerland. 

Bottom contact OFETs (Figure 1) are fabricated using a combination of pad printing and spray coating technologies. An aluminum coated Mylar film is used as the gate substrate.  A Nanocomposite consisting of cross-linked Propylene Glycol Methyl Ether Acetate and Barium Titanate (BTO) nanoparticles was developed as the gate insulator.  The bimodal Nanocomposite utilized had two different filler particle sizes; 200 nm. and 1000 nm. diameter particles.   Due to the nanosize of the BTO, it disperses well in the organic solvent, which makes it possible to use solution-processable methods, such as pad printing to fabricate the devices.  Various Nanocomposite thicknesses were evaluated. 

Figure 1. Bottom Contact OFET Structure